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NB3L83948C Datasheet 2.5v / 3.3v Differential And Lvttl/lvcmos 2:1 Mux To 1:12 Lvcmos

Manufacturer: onsemi

Overview: NB3L83948C 2.5 V / 3.3 V Differential and LVTTL/LVCMOS 2:1 MUX to 1:12 LVCMOS.

Datasheet Details

Part number NB3L83948C
Manufacturer onsemi
File Size 79.28 KB
Description 2.5V / 3.3V Differential and LVTTL/LVCMOS 2:1 MUX to 1:12 LVCMOS
Datasheet NB3L83948C-ONSemiconductor.pdf

General Description

The NB3L83948C is a pure 2.5 V / 3.3 V (VDD = VDDO) or mixed mode 3.3 V Core (VDD) / 2.5 V Output (VDDO) clock distribution buffer with the capability to select either a differential LVPECL / LVDS / LVHSTL / SSTL / HCSL or single ended LVCMOS / LVTTL patible input clock, such as a Primary or a Test Clock.

All other control inputs (CLK_SEL, CLK_EN, and OE) are LVTTL/LVCMOS level patible.

The NB3L83948C provides an enable input, CLK_EN pin, which synchronously enables or disables the clock outputs while in the LOW state.

Key Features

  • 2.5 V / 3.3V (VDD = VDDO) or 3.3 V VDD / 2.5 V VDDO Operation: 2.5 $5%, 2.375 to 2.625 V 3.3 $5%; 3.135 to 3.465 V.
  • 350 MHz Clock Support.
  • Accepts LVPECL, LVDS, LVHSTL, SSTL, HCSL, or LVCMOS Clock Inputs.
  • LVCMOS Compatible Control Inputs.
  • 12 LVCMOS Clock Outputs.
  • Synchronous Clock Select.
  • Output Enable to High Z State Control.
  • 100 ps Max. Skew Between Outputs.
  • Industrial Temp. Range.
  • 40°C to +85°C.

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